| submit a site to this category |
|   |
| Subcategories | |||
|---|---|---|---|
| Cell@ | Reconfigurable@ | Transputer@ | iAPX-432@ |
|
|
NUMAchineURL: http://www.eecg.toronto.edu/parallel/parallel/NUMA.Welcome.html ODP description: Shared memory multiprocessor architecture, and software for easy and efficient use: Tornado operating system, Jasmine compiler. Descriptions, documents, papers, pictures. Page title: NUMAchine Home Page ![]() |
|
|
1,000 Cores on a ChipURL: http://www.technologyreview.com/read_article.aspx?id=17076&ch=infotech ODP description: Brief article on Rapport's Kilocore chip, which may be used for video processing. Technology Review. Page title: Technology Review: 1,000 Cores on a Chip ![]() |
|
|
PiSMA: A Parallel VSM ArchitectureURL: http://www.acm.org/crossroads/xrds5-3/pisma.html ODP description: Parallel vIrtually Shared Memory Architecture; merges benefits of shared and distributed memory models, secures confidential communication via authentication. [ACM Crossroads] Page description: Securing confidential communication using authentication; ACM Crossroads ![]() |
|
|
Chip Multiprocessing (CMP) ResourcesURL: http://www.princeton.edu/~jdonald/research/cmp/ ODP description: Large link page: press releases, academic papers, presentations on dual-core and multicore processors. By James Donald, Electrical Engineering Department, Princeton University. Page title: CMP resources: News, academic papers, and presentations on dual-core and multicore processors ![]() |
|
|
Intel Pieces Together 80-core ProcessorURL: http://www.pcauthority.com.au/news.aspx?CIaNID=45804 ODP description: Researchers craft early model, as part of Intel tera-scale computing project to build fast parallel processor. PC Authority. Page title: Intel pieces together 80-core processor - General News - www.pcauthority.com.au Page description: Tera-scale project inches forward. ![]() |
|
|
Alewife ProjectURL: http://www.cag.lcs.mit.edu/alewife/ ODP description: A large-scale multiprocessor that integrates both cache-coherent, distributed shared memory and user-level message-passing in a single integrated hardware framework. Papers available. Page title: MIT Alewife Project: Home Page ![]() |
|
|
Time to Accept Parallel but Not without a FightURL: http://www.electronicsweekly.com/ARTICLES/2006/03/10/37867/Time+to+accept+parallel+but+not+without+a+fight.HTM ODP description: Physical law is forcing the semiconductor industry to accept something it knew all along but refused to acknowledge: the most effective way to provide high-performance is to use many processors, not just one. [ElectronicsWeekly] Page title: Time to accept parallel but not without a fight - 10/03/2006 - Electronics Weekly Page description: The laws of physics are forcing the semiconductor industry to accept something it knew all along but refused to acknowledge: use lots of microprocessors rather than just one ![]() |
|
|
Rapport, Inc.URL: http://www.rapportincorporated.com/ ODP description: Makes high performance, lower power parallel processor chips, uses PowerPC core with 256 subcores, to produce Kilocore chip with over 1,000 cores. Page title: Rapport, Inc. - Home Page description: Rapport, Inc. - Power in Parallel, Rapport - Kilocoreâ⢠Technology, Rapport - high performance, lower power chips., Kilocore Development Platform ![]() |
|
|
MultiprocessingURL: http://en.wikipedia.org/wiki/Multiprocessing ODP description: Growing entry, with links to many related topics. [Wikipedia] Page title: Multiprocessing - Wikipedia, the free encyclopedia ![]() |
|
|
The Era of Tera: Intel Reveals More about 80-core CPUURL: http://www.anandtech.com/cpuchipsets/showdoc.aspx?i=2925 ODP description: Last year Intel talked of 80-core Teraflop CPU. Today we get many more details on architecture and role in future of multicore CPUs. AnandTech. Page title: AnandTech: The Era of Tera: Intel Reveals more about 80-core CPU Page description: Last year Intel talked about an 80-core Teraflop CPU, today we get many more details on its architecture and its role in the future of many-core CPUs. ![]() |
|
|
Beyond the Teraflops: Why Intel Really Put 80 Cores on a Single ChipURL: http://arstechnica.com/articles/paedia/cpu/terascale.ars ODP description: Network is main motive; based on interview with Thom Sawicki, technology strategist, Intel Communications Technology Lab, on the Terascale computing research initiative. Ars Technica. Page title: Beyond the teraflops: Why Intel really put 80 cores on a single chip: Page 1 ![]() |
|
| |